Understanding the Construction and Working of an LVDT Schematic

schematic diagram of lvdt

Begin with a primary coil configuration: Position two identical windings symmetrically around a movable core–this forms the foundation. The excitation winding, center-mounted, should operate at 1–10 kHz with 3–6V RMS to avoid saturation while ensuring linearity. Secondary coils must mirror each other precisely, spaced at 180° phase opposition to cancel zero offsets. Misalignment beyond 0.5% of full-scale range introduces harmonic distortion detectable in output noise.

Core material selection dictates sensitivity: Mu-metal or nickel-iron alloys yield superior magnetic coupling (relative permeability >10,000) compared to ferrite, reducing hysteresis losses below 0.1%. The core’s stroke-to-length ratio should not exceed 1:4; exceeding this threshold distorts signal amplitude by 12-15%. For submicro-inch resolution, maintain air gaps under 0.2 mm–any variance degrades repeatability.

Signal conditioning mandates strict filtering: Post-demodulation, use a 4th-order Butterworth filter with a cutoff at 1.5× the excitation frequency to eliminate aliasing. Failure to suppress ripple below -60 dB leads to false zero-crossing triggers in high-speed applications. For DC output, a precision instrumentation amplifier with

Wiring topology affects common-mode rejection: Shielded twisted pairs (individually grounded at one end) must connect secondary outputs to minimize capacitive coupling. Ground loops, if unaddressed, introduce 50–60 Hz interference, corrupting measurements by ±20 mV. For remote installations, opt for differential signaling over coaxial cables–losses above 0.5 dB/m skew phase relationships.

Validation requires dynamic testing: Apply a sinusoidal displacement sweep spanning 0–100% of the linear range while logging output voltage against known inputs. Deviation from ideal 5V/V sensitivity indicates miswound coils or core misalignment–adjust iteratively using a laser interferometer reference. Static testing alone fails to reveal hysteresis effects, which manifest only under transient loads.

Core Layout of a Linear Variable Differential Transformer

Position the primary coil at the center with symmetrical secondary coils on either side, spaced precisely to ensure a linear output range of ±10% of the total stroke length. Use a ferromagnetic core with a length-to-diameter ratio of at least 4:1 to minimize harmonic distortion–typical materials include nickel-iron alloys (e.g., Permalloy) for high sensitivity or ferrites for cost-sensitive applications. Connect the secondary coils in series opposition to cancel baseline voltage, leaving only the differential signal proportional to displacement; ensure phase alignment within ±2° to avoid zero-offset errors.

For excitation, apply a sine wave at 3–10 kHz with amplitudes between 3–10 V RMS–higher frequencies reduce phase lag but increase eddy current losses, while lower frequencies improve penetration depth in conductive targets. Match the impedance of the signal conditioning circuit to the coil’s nominal impedance (typically 50–500 Ω) to prevent loading effects; a table of recommended coupling capacitors follows:

Core Material Excitation Frequency (kHz) Coupling Capacitor (nF) Max Stroke (mm)
Permalloy 5 4.7–10 ±50
Ferrite 3 22–47 ±25
Silicon Steel 10 1–2.2 ±75

Avoid placing the device near AC power lines or switching regulators–induced noise at the excitation frequency can corrupt measurements. Use shielded twisted-pair wiring for both excitation and output signals, grounding the shield at a single point on the signal ground to eliminate ground loops. Calibrate zero displacement at the mechanical center of the stroke and verify linearity by measuring output at 10% increments of full range; non-linearity should not exceed 0.25% of full scale. For extended strokes (>100 mm), consider a segmented design with overlapping coil sections to maintain sensitivity.

Core Structure and Magnetic Coupling Representation

Select a ferromagnetic core with high permeability (μr > 10,000) to minimize excitation currents below 50 mA while achieving linear displacement sensitivity of ±0.1% FS. Use laminations stacked at 0.1 mm thickness to suppress eddy losses; verify with a Hall probe at 1 kHz to confirm flux uniformity within ±2% along the active length. Torque the core housing screws to 0.8 Nm to prevent micro-gaps that distort the B-H loop symmetry.

Position the primary coil centrally with a ±0.2 mm tolerance to ensure 50/50 flux split into secondary windings; misalignment beyond this reduces output by 0.3% per 0.1 mm deviation. Wind secondary coils in opposite directions using 38 AWG wire with a fill factor ≥ 92%; verify phase opposition with an oscilloscope showing ≤ 1° shift at 3 Vrms input. Apply epoxy encapsulation rated for -55°C to +150°C to prevent thermal drift exceeding 20 ppm/°C.

Mount the movable rod with a clearance of 0.05 mm to avoid friction-induced hysteresis; surface-coat with nickel-phosphorus (8% P) for wear resistance. Use a spring-loaded guide bearing (k = 1.2 N/mm) to maintain axial alignment; lateral play above 0.1 mm introduces nonlinearity > 0.5% FS. Test linearity at 0%, 50%, and 100% stroke with a laser interferometer to confirm residuals below ±0.05%.

Ground the core assembly via a braided copper strap (Z pp with a spectrum analyzer (10 Hz–10 kHz). Shield the transducer housing with mu-metal (≥ 0.5 mm) to attenuate external fields by 40 dB; test immunity by exposing to 50 mT without output deviation exceeding ±0.1%.

Employ a carrier frequency of 5 kHz to balance resolution and eddy current losses; higher frequencies (>10 kHz) increase phase lag, while lower frequencies (c = 1 kHz, 4th order) to reject harmonics without introducing overshoot > 5%.

Validate magnetic coupling efficiency by measuring secondary output impedance (target: 50–100 Ω) at null position; deviations indicate incomplete flux linkage. Inject a differential current (10–100 µA) into secondaries to simulate displacement; expect a linear region of ±2.5 mm with

Failure Modes and Mitigation

Monitor coil resistance changes > 1% as indicative of insulation breakdown; replace wire if interwinding capacitance exceeds 200 pF/m. If null voltage drifts > 5 mV, recenter the core mechanically before recalibrating. High-frequency noise (>1 kHz) on the output suggests loose connections; re-crimp terminals with silver-plated contacts.

Material Selection Criteria

schematic diagram of lvdt

Prefer Permalloy 80 for cores requiring low coercivity (

Primary and Secondary Coil Wiring Connections

Connect the excitation winding (primary) to a stable AC source with a frequency between 1 kHz and 10 kHz–optimal performance occurs at 3 kHz for most industrial applications. Ensure the voltage matches the sensor’s specifications (typically 3V RMS to 6V RMS) to prevent magnetic saturation while maintaining sufficient signal amplitude. Use shielded twisted-pair cables for the primary leads to minimize electromagnetic interference, grounding the shield at the source end only to avoid ground loops.

Align the secondary coils in a differential configuration, connecting their leads in series opposition to cancel out common-mode noise and enhance sensitivity. Verify polarity by observing the output phase: a 180° shift between the two secondaries indicates correct wiring. If phase alignment is incorrect, swap the leads of one secondary coil–this adjustment is critical for accurate displacement measurement.

Terminate the secondary output with a high-impedance load (100 kΩ or greater) to avoid loading effects, which distort linearity. For signal conditioning, use a differential amplifier with a gain of 10–100, depending on the required output range. Active filters should target the excitation frequency ±10% to reject harmonics and broadband noise while preserving the core displacement signal.

For sensors with integrated signal conditioning, follow the manufacturer’s pinout–typically, the primary connects to pins marked “EXC+” and “EXC–,” while the secondaries use “S1,” “S2,” and a common ground. If the sensor lacks internal conditioning, add a precision rectifier circuit to convert the AC differential output to a DC voltage proportional to displacement. Ensure all solder joints are cold-solder-free and utilize gold-plated connectors for low-resistance contacts in high-vibration environments.

Test wiring integrity by applying a known displacement (e.g., full-scale range using a micrometer) and verifying the output matches the datasheet’s linearity curve. If nonlinearity exceeds ±0.5% of full scale, recheck coil symmetry, excitation voltage, and cable shielding. For long cable runs (>10 meters), use a remote signal conditioner near the sensor to avoid signal degradation.

In high-temperature applications, select insulation rated for the operating environment–polyimide for temperatures up to 200°C or fiberglass for extreme conditions. Avoid splices in the coil wiring; route cables in separate conduits from power lines to prevent inductive coupling. Document all wire colors and pin assignments in the system manual for troubleshooting and maintenance.

Integrating Signal Processing Networks into Transformer-Based Displacement Sensors

schematic diagram of lvdt

Select a precision rectifier with operational amplifiers (op-amps) rated for low input offset voltage (under 100 µV) and high input impedance (above 10 MΩ) to minimize loading errors in the core position sensing loop. Pair the op-amp with fast recovery diodes (Schottky or low-leakage silicon) to prevent distortion during zero crossing, ensuring linearity within 0.1% across the full stroke range.

Implement a two-stage filter: a first-order low-pass filter with a cutoff frequency of 10 kHz to suppress high-frequency noise from excitation sources, followed by a second-order Sallen-Key filter tuned to 1 kHz to eliminate residual ripple. Use precision resistors (0.1% tolerance) and polypropylene capacitors (low dielectric absorption) to maintain phase coherence between sine waves and avoid amplitude drift exceeding 0.05% over temperature variations (-40°C to +85°C).

  • Place the excitation driver on the same PCB as the sensing coils to reduce parasitic inductance–keep traces under 5 mm and route return paths adjacent to signal paths.
  • Use star grounding for all reference nodes to prevent ground loops; isolate analog ground from digital ground with a ferrite bead (1 kΩ at 10 MHz).
  • For differential outputs, include a common-mode choke (600 Ω impedance at 10 kHz) between the sensor and signal processor to block EMI from stepper motors.

Avoid phase-locked loops for demodulation if the excitation frequency drifts more than 0.5%–instead, use a synchronous detector driven by a buffered reference signal tapped directly from the excitation oscillator. Include a temperature-compensated voltage reference (TCVR, 5 ppm/°C drift) to stabilize the detector’s gain, ensuring output sensitivity remains within 0.02% of full scale per degree Celsius. Sample the conditioned output at 10x the excitation frequency to prevent aliasing without requiring anti-aliasing filters with steep roll-off.

Route power tracks with at least 2 oz copper thickness and decouple each op-amp and voltage reference with 0.1 µF ceramic capacitors (X7R dielectric) and 10 µF tantalum capacitors at the power entry. Use via stitching along high-current paths to reduce inductance, keeping vias spaced no farther than 3 mm apart. Validate the entire network with a network analyzer–confirm gain flatness within 0.2 dB and phase linearity within 2° across the operating frequency band.