How to Build and Understand Inverter Welding Machine Circuit Diagrams

Start with a push-pull MOSFET stage rated for at least 200V breakdown and 30A continuous current. Use IRFP460 or IXYS IXFH32N120–these handle transient spikes better than cheaper alternatives. Pair each transistor with a fast-recovery diode like UF4007 across drain-source to clamp voltage surges during switching transitions. Avoid ultra-fast diodes here; their reverse recovery time introduces ringing that erodes efficiency.
For the primary transformer core, select a ferrite material optimized for 40–80 kHz operation. EE55 or EPC30 cores from TDK’s PC40 or PC95 series provide saturation flux densities around 0.4 T while keeping hysteresis losses under 150 mW/cm³ at 60 kHz. Wind primary turns with 3-4 layers of 1.5 mm² Litz wire to minimize skin effect losses–standard solid wire will overheat at currents above 15A RMS. Secondary windings should use triple-insulated wire (e.g., TEX-E rated 600V) with at least 5 turns per volt for a 50V output.
Implement a gate driver IC with built-in dead-time control–IR2110 or UCC27424 prevent shoot-through by enforcing 200–300 ns delays. Use bootstrap capacitors (0.1 µF, 50V ceramic) and series resistors (10 Ω, 1W) on gate lines to dampen oscillations. Omitting these causes false triggering and MOSFET failure within minutes at high duty cycles.
Regulate the output with a current-mode PWM controller–UC3845 or LT1246 work well for arc applications. Set the feedback loop with 10 kΩ sensing resistor and 10 µF compensation capacitor to stabilize the system at 20 kHz bandwidth. Higher bandwidth reduces overshoot but increases noise sensitivity–balance requires testing with a current probe and oscilloscope.
Isolate the control circuit using optocouplers with CTR > 100% (PC817 or HCPL-3120) and 1.5 kV reinforced insulation. Place a 10 Ω resistor in series with the optocoupler LED to limit inrush current–direct connection risks LED burnout during transients. For auxiliary power, use a flyback converter with a VIPer12A or similar offline switcher, isolating primary and secondary sides with a 1:1.5 turns ratio and Y1 safety capacitors.
Key Power Conversion Layouts for High-Frequency Arc Units

Begin with a full-bridge topology for primary switching–this ensures optimal voltage regulation and minimizes harmonic distortion. Use four IGBTs or MOSFETs rated at 600V/30A minimum, paired with ultrafast recovery diodes (e.g., STTH30R06). Place snubber capacitors (100nF/1kV) across each switch to suppress voltage spikes during turn-off. The transformer core should be toroidal ferrite (e.g., N87 material) with a cross-sectional area of at least 5 cm² to prevent saturation at 50 kHz switching frequency.
For secondary rectification, employ a center-tapped configuration with dual Schottky diodes (e.g., MBR3060PT) to reduce forward voltage drop. Add LC filters on the output: a 10 μH inductor followed by a 4700 μF/100V electrolytic capacitor. This combination smooths current ripple to below 5% at full load. Ensure all high-current traces on the PCB are at least 3 oz copper, with 5mm width per ampere to prevent overheating.
- Gate drivers: Opt for isolated drivers like TI’s UCC21520, with reinforced insulation for primary-secondary separation.
- Feedback loop: Use a Hall-effect sensor (e.g., ACS712) for current sensing, paired with a precision op-amp (TL431) for voltage feedback.
- Protection: Implement overcurrent shutdown via a latched comparator (LM393) monitoring the sensor output, triggered at 120% of rated current.
- Cooling: Mount switching devices on aluminum heatsinks with thermal paste; fan cooling is mandatory for loads above 150A.
For control logic, a microcontroller (STM32F103) generates PWM signals with dead-time adjustment (minimum 2 μs) to prevent shoot-through. Program the MCU to limit duty cycle to 95% and include soft-start functionality (200 ms ramp-up) to avoid inrush current. Power the MCU and drivers from an auxiliary flyback converter (e.g., VIPer12A), outputting 12V/1A with galvanic isolation. Test the layout with a dummy load (1 Ω/200W) before connecting to the arc torch–observe waveforms with an oscilloscope (probes on 10x setting) to confirm clean switching edges and absence of ringing.
Key Components Layout in a Power Conversion Unit for Arc Joining
Position the high-frequency switching transistors (IGBTs or MOSFETs) on a dedicated heatsink adjacent to the primary coil of the power transformer. Use thermal pads with a minimum conductivity of 1.5 W/m·K and secure them with non-conductive screws rated for 120°C continuous operation. Avoid aluminum heatsinks thinner than 5 mm–opt for copper or copper-infused alloys if weight permits.
Space the input rectifier diodes no less than 15 mm apart to prevent capacitive coupling at switching frequencies above 50 kHz. Pair each diode with a snubber capacitor rated for 2.2 μF and 630 V, placed within 20 mm of the diode leads. For transient suppression, add a varistor (MOV) with a clamping voltage of 390 V across the DC bus immediately after the rectifier stage.
| Component | Spacing (mm) | Thermal Interface | Voltage Rating |
|---|---|---|---|
| IGBT/MOSFET | 10–12 | 1.5 W/m·K pad | ≥1200 V |
| Rectifier Diode | ≥15 | None (air gap) | ≥400 V |
| Snubber Capacitor | None | 630 V |
Mount the PWM control IC on a separate PCB layer perpendicular to the power stage to minimize induced noise. Isolate analog and digital grounds with a ferrite bead (μ ≥ 1000) or a 1 Ω resistor. Keep trace lengths for the gate drive signals under 50 mm–exceeding this increases propagation delay and risks false triggering under load transients.
Route the DC bus capacitors in a star configuration toward the switching elements. Use electrolytic capacitors with ESR below 20 mΩ for bulk storage and film capacitors rated for 400 VDC/200 VAC for high-frequency ripple. Place the film caps within 30 mm of the transistors; longer distances introduce parasitic inductance, degrading efficiency by 3–5% at 80% duty cycle.
Design the gate driver circuit with galvanic isolation–optocouplers or digital isolators–to prevent HV spikes from damaging the logic. Place the driver ICs no farther than 10 mm from the switching transistors. Use twisted-pair wiring for gate drive signals if PCB traces exceed 70 mm; untwisted traces act as antennas, picking up EMI from the arc plasma.
Locate the output inductor as close to the transformer secondary as possible. For core selection, use ferrites with saturation flux density (Bsat) ≥ 0.4 T, such as PC40 or PC95. Wind the coil with Litz wire (≥100 strands of 0.1 mm diameter) if operating above 30 kHz to reduce skin effect losses. Secure the windings with high-temperature epoxy (180°C Tg) to prevent vibration-induced drift.
Integrate a soft-start relay to bypass the inrush current limiter at power-up. Place the relay between the input capacitor bank and the rectifier, sized for 1.5× the nominal line current. For 230 VAC input, use a 20 A relay with contacts rated for 250 VAC inductive load. Add a 100 nF ceramic capacitor in parallel to suppress contact arcing.
Apply conformal coating (acrylic or silicone) to all exposed copper pours and vias carrying currents above 5 A. Test the coating’s dielectric strength at 1.5 kV/mm; thinner regions risk corona discharge under humidity. For outdoor use, add a desiccant packet inside the enclosure and seal with IP65-rated gaskets to prevent conductive dust ingress.
Step-by-Step Assembly of High-Frequency Transformer for Power Conversion Units
Select a toroidal core with a saturation flux density of at least 0.4 T and relative permeability above 2000 (e.g., ferrite material N87 or similar). Wind the primary coil first using 1.5 mm² Litz wire, ensuring 18–22 turns for an operating range of 50–100 kHz. Maintain uniform spacing between turns to prevent capacitance coupling; verify inductance with an LCR meter (target: 30–50 μH). Secure the winding with high-temperature adhesive tape rated for 200°C.
For the secondary, use 3 mm² stranded copper with triple insulation: first layer PTFE sleeving, second layer fiberglass tape, third layer silicone varnish. Wind 8–10 turns, adjusting based on output voltage requirements (e.g., 4 turns per volt for 70 kHz switching). Terminate each winding with crimped ring terminals, then apply a dual-component epoxy to immobilize connections before final potting in a phenolic resin housing to mitigate vibration-induced failures. Test interwinding isolation with a 1 kV megohmmeter; minimum resistance must exceed 50 MΩ.
Understanding and Configuring the MOSFET Switching Stage
Set gate resistor values between 10Ω and 47Ω to balance switching speed and overshoot suppression–lower resistance increases speed but risks ringing; higher resistance stabilizes waveforms but adds propagation delay. Use a 12V Zener diode rated 200mW or higher across the gate-source terminals to clamp transients exceeding the MOSFET’s absolute maximum rating, preventing avalanche breakdown in fast-switching applications.
- Select a driver IC with adjustable dead-time control (e.g., UCC27211, LM5111) to eliminate shoot-through currents–minimum 50ns dead-time is recommended for 20kHz operation.
- Place the gate resistor and driver output within 2cm of the MOSFET to minimize parasitic inductance; route traces as short, wide paths (minimum 2mm width for 3A RMS).
- Thermal vias (0.3mm diameter, 4 per pad) under the MOSFET tab improve heat dissipation when mounted on a 2oz copper PCB; ensure via depth does not exceed 0.8mm to avoid solder wicking.
Verify switching performance with a 20MHz bandwidth oscilloscope–target rise/fall times under 30ns for 100V/μs dV/dt and peak gate voltage within ±20% of nominal drive voltage. If ringing exceeds 2V peak-to-peak, add a 1nF C0G ceramic capacitor between gate and source; adjust capacitance in 0.5nF increments until ringing amplitude drops below 15% of the drive voltage without increasing dead-time beyond 100ns.