IC-718 Radio Transceiver Circuit Diagram and Component Layout Analysis

The Yaesu FT-1000D service manual provides a useful reference for troubleshooting high-frequency signal paths, but the ICOM IC-718’s printed circuit board organizes components differently. Locate Q101 (3SK293) near the antenna input–this dual-gate MOSFET handles initial RF amplification. Verify its bias voltages: Gate 1 should sit at 0.5–1.2V, while Gate 2 requires 4.5–5.5V from the AGC line. Deviations beyond ±0.3V indicate either a faulty transistor or corroded PCB traces around C107 (47pF).

For intermediate frequency analysis, trace the path from FL101 (10.7MHz ceramic filter) to IC1 (TA31136FN). Measure the output at Pin 9–it must swing between -10dBm and -5dBm when a 50μV signal is injected at the antenna. If levels drop below -15dBm, replace FL101 or check solder joints under L102. Avoid probing directly with metallic tools; use a x10 oscilloscope probe to prevent detuning the tuned circuits.

Power supply stability is critical. The 78M05 (IC402) regulator must output 4.95–5.05V under load–any ripple above 20mVpp suggests failing C407 (470μF) or a shorted D403 (1N4007). Monitor TP401 during RX/TX switching; a spike exceeding 5.2V for more than 50μs risks damaging IC103 (TC9164FN). Replace C407 with a low-ESR 1000μF capacitor if noise persists.

Alignment requires a two-tone signal generator set to 1kHz/400Hz at -30dBm. Adjust L101 for maximum output on Pin 14 of IC1 while observing distortion on an FFT analyzer–THD should remain below 1%. If tuning yields erratic results, check VR101, a 10kΩ trimpot controlling the AGC threshold. Rotate it fully counterclockwise to isolate whether the issue lies in the IF strip or the detector stage.

Practical Guide to the Radio’s Circuit Blueprint

Begin by identifying the power supply section in the lower-left corner of the layout. The primary input accepts 13.8V DC, filtered through a pair of electrolytic capacitors (C1, C2: 1000μF) to suppress noise. Ensure these components are within tolerance (±20%)–deviations beyond this range risk voltage spikes disrupting RF stability. Bypass capacitors (C3: 0.1μF, ceramic) near the regulator IC (7805) must be soldered as close as possible to its pins to prevent high-frequency oscillations.

Trace the signal path from the antenna input (J1) through the band-pass filters (FL1-FL5). Each filter corresponds to a specific frequency range–3.5-4.0 MHz (FL1), 7.0-7.3 MHz (FL2), and so on. Measure the insertion loss using a network analyzer; values should not exceed 3dB for any filter. Replace any filter showing higher attenuation, as it indicates cracked ferrite cores or oxidated contacts.

Filter	Frequency Range (MHz)	Nominal Attenuation (dB)	Critical Component
FL1	3.5–4.0	2.8	L1 (15μH)
FL2	7.0–7.3	2.5	C4 (68pF)
FL3	10.1–10.15	3.0	L3 (6.8μH)

Locate the mixer stage (Q3, Q4: 2SC1973) immediately after the preamp. The local oscillator signal (TX/RX switchable via D1-D4) mixes with incoming RF here. Verify the oscillator’s output at TP3–it should read -10dBm at 9.0 MHz. If the signal is weak or distorted, check Q6 (2SC2999) and its surrounding resistors (R21, R22: 2.2kΩ); drift here causes reception gaps.

Inspect the intermediate frequency (IF) chain next. The 455kHz ceramic filter (CF1) must show a 6dB bandwidth of 2.4kHz. Use a sweep generator to plot its response–any asymmetry suggests a faulty filter or misaligned adjacent transformers (T1, T2). Replace CF1 if the passband deviates by more than ±100Hz from center.

Examine the automatic gain control (AGC) circuit. The detector diode (D5: 1SS86) rectifies the IF signal, feeding the AGC amplifier (Q7: 2SC1815). Adjust VR1 while monitoring the voltage at TP5–it should vary smoothly between 0.5V and 2.5V as incoming signals change. Stuck values indicate a shorted C11 (47μF) or open R25 (47kΩ).

For the transmitter path, verify the driver stage (Q8: 2SC2166) delivers +10dBm into the final amplifier (Q9: 2SC2312). Key the radio in CW mode and measure current draw–it should settle at 1.2A (HF bands) or 1.8A (10m band). Excessive current suggests a saturated transistor or improper heatsink contact on Q9 (often overlooked).

Check the digital control section’s microcontroller (IC3) for stable clock signals. The 8MHz crystal (X1) should maintain ±50ppm accuracy; drift disrupts frequency synthesis. Use an oscilloscope to confirm clean square waves on both crystal pins–ringing or rounded edges indicate a failing crystal or noisy power rail (decouple with C12: 0.01μF).

Finally, validate the audio path. The LM386 amplifier (IC5) should produce 1W RMS into an 8Ω speaker with

Key Components and Signal Flow in the Transceiver’s Core Design

Begin analysis by isolating the RF input section, where the antenna feeds signals into a bandpass filter network. This front-end stage attenuates out-of-band interference before amplification occurs. The primary filter uses discrete LC components tailored for 160m to 10m bands, with impedance matching critical to prevent signal reflection at the mixer input.

Trace the signal path to the first mixer, where a local oscillator (LO) combines with incoming RF. The LO frequency, generated by a Phase-Locked Loop (PLL) and Voltage-Controlled Oscillator (VCO), must maintain stability within ±20 Hz for SSB demodulation. Use a frequency counter to verify LO accuracy–deviations here propagate downstream as audible distortion.

Examine the intermediate frequency (IF) chain next. The IF stage centers at 45.05 MHz, using ceramic filters with 2.4 kHz bandwidth for SSB and 500 Hz for CW. Replace poorly performing filters only with identical specifications–swapping for wider filters degrades selectivity, while narrower ones risk cutting sidebands. Bias currents in the IF amplifier require adjustment if signal amplitude drifts beyond ±6 dB.

The audio processing stage relies on dual operational amplifiers (TL072) for both microphone input and received audio. Check for DC offset on the mic preamp–values above 5 mV indicate failing capacitors or incorrect bias. The audio power amplifier (TDA2003) delivers 4W to the speaker; thermal shutdown occurs at 150°C, so ensure proper heatsink contact.

Control logic hinges on the microprocessor (TMP47C433AN), managing mode selection, VFO tuning, and display updates. If tuning steps erratically, inspect the rotary encoder’s quadrature signals–clean square waves confirm proper function, while noise suggests a degraded encoder or poor grounding. The VFO uses a varactor-tuned LC circuit; temperature drift here manifests as frequency instability, solvable only by recalibrating the VCO core.

Power distribution demands scrutiny. The linear regulators (7805, 7905) must hold output within ±5% under load–ripple above 10 mVpp corrupts audio clarity. Replace electrolytic capacitors in the power supply every 8–10 years, even if ESR tests pass; degraded caps introduce low-frequency hum. The final RF power amplifier (2SC1969) operates in Class AB; verify bias current at 100–150 mA for optimal linear output.

Interconnections between modules often degrade over time. Corroded header pins at the main board’s edge connectors cause intermittent faults–clean with contact cleaner and reseat. The PLL loop filter components (resistor and capacitor values) dictate lock time; deviations from the original 10 kΩ and 10 nF pairing slow frequency acquisition. For troubleshooting, a spectrum analyzer at the IF test point reveals unwanted spurs, while an oscilloscope on the audio lines detects clipping or distortion waveforms.

Step-by-Step Tracing of the RF Signal Flow in the Circuit Layout

Locate the antenna input terminal first–marked as ANT or RX–and follow the thick trace leading to the bandpass filters. These filters, typically LC networks, reject out-of-band signals before they reach the first amplification stage. The output connects directly to the preamplifier (Q1 or similar), which boosts weak signals while maintaining a low noise figure. Check for bias resistors (R3, R4) and coupling capacitors (C5, C6) that isolate DC and pass RF.

From the preamplifier, the signal enters the mixer (IC1, pin 1 or dedicated transistor pair). Here, the incoming RF combines with the local oscillator (LO) frequency to produce intermediate frequency (IF) outputs. Look for balun transformers or ferrite beads (T1) that match impedances and suppress harmonics. The IF output (IF OUT) exits the mixer through a tuned circuit, often labeled 455 kHz or 9 MHz, depending on the design.

Trace the IF path through ceramic or crystal filters (CF1, CF2) to ensure selectivity. These components reject adjacent signals before feeding the IF amplifier (IC2, pins 2-5). Finally, the signal reaches the detector (D1), where it’s demodulated into audio. Verify ground connections and shielding around high-gain stages to prevent feedback or oscillation.

Power Supply and Voltage Regulation Analysis

Replace the stock bridge rectifier (D5–D8) with ultra-fast recovery diodes rated for 3A/200V. The original 1N4007 introduces ~1.1V forward drop at 1A, causing >2W dissipation and thermal drift in the unloaded 13.8V rail. Measure the ripple at C123 (4700µF) with a 100MHz scope; it should not exceed 30mVpp at full TX load (20A transient). If exceeding, parallel an additional 2200µF low-ESR capacitor within 5cm of the regulator IC.

Linear Regulator Stress Points

Check Q101 (2SC2878) base-emitter voltage drop–it must not exceed 0.7V under any load. A 0.85V reading indicates imminent failure, often caused by cracked solder joints on the PCB vias near the heatsink. Reflow these joints with 63/37 Sn-Pb solder and reinforce with a 1.5mm copper braid to the ground plane. The 78M05 regulator (REG1) requires a minimum 2V headroom; at 15.5V input, efficiency drops below 30%, so stabilize the primary transformer secondary at 12.6VAC±0.3V.

Add a 560Ω resistor in series with the feedback divider (R140/R141) for the auxiliary 8V rail. This reduces cross-regulation error from 5% to